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Optimal Unified Architectures for the Real-Time Computation of Time Recursive Discrete Sinusoidal Transforms

Abstract 

A universal transform processor using at least a one dimensional (1-D) transform processor to produce N dimensional transforms without transposition and providing a fully pipelined structure with a through put rate of N clock cycles for an N.times.N successive serial input with parallel output data. The universal transform processor can efficiently compute Discrete Cosine, Sine, Hartley, Fourier, Lapped Orthogonal, and Complex Lapped transforms for continuous input data stream. The architecture is regular, modular, and has only local interconnections in both data and control paths. The universal transform processor is practical for very large scale integrated (VLSI) implementation.

Inventor(s)

K. J. Ray Liu
Chin-Te Chiu

Date Issued 

08/16/1994

Patent No. 

5,339,265