ArtIAMAS Seminar Series: Embedded System Design Optimization at the Network Edge

Wednesday, January 26, 2022
12:00 p.m.
Online Seminar

ArtIAMAS Seminar Series 

[Co-organized by UMBC, UMCP and Army Research Lab]

https://umbc.webex.com/meet/nroy


Embedded System Design Optimization at the Network Edge

Shuvra S. Bhattacharyya

Dept. of ECE and Institute for Advanced Computer Studies
University of Maryland at College Park

Abstract

Sophisticated sensor processing at the network edge opens up many new applications for extraction and exploitation of knowledge from diverse sensing modalities. However, these applications must typically satisfy stringent constraints on real-time performance and energy efficiency, and they involve complex trade-offs among processing that is performed at the edge, processing that is offloaded to more powerful resources (in the fog or cloud), and the communication required for such offloading. In this talk, I will discuss models and methods to explore the opportunities and address the challenges associated with pushing complex sensor processing tasks to the edge. Core themes of the presentation will include (1) model-based design methodologies, particularly those based on dataflow models of computation, for design and implementation of complex embedded hardware/software systems, and (2) design optimization techniques for efficiently utilizing multicore embedded processing platforms under stringent constraints on performance and energy consumption.

Biography

Shuvra S. Bhattacharyya is a Professor in the Department of Electrical and Computer Engineering at the University of Maryland, College Park. He holds a joint appointment in the University of Maryland Institute for Advanced Computer Studies (UMIACS), and is affiliated with the Maryland Crime Research and Innovation Center (MCRIC). He also holds a part-time visiting position as Chair of Excellence in Design Methodologies and Tools at the National Institute for Applied Sciences (INSA) in Rennes, France. His research interests include signal processing, embedded systems, electronic design automation, machine learning, wireless communication, and wireless sensor networks. He received the Ph.D. degree from the University of California at Berkeley. He has held industrial positions as a Researcher at the Hitachi America Semiconductor Research Laboratory (San Jose, California), and Compiler Developer at Kuck & Associates (Champaign, Illinois). He is a Fellow of the IEEE and recipient of the NSF CAREER Award.

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