NSF: A High Level Synthesis Approach to Logic Obfuscation

Faculty

Ankur Srivastava

Funding Agency

National Science Foundation

Year

2020

Descriptions

Use of untrusted foundries for integrated circuit (IC) fabrication has raised piracy and overproduction concerns. Logic/design locking (also known as logic obfuscation) can secure design details from an untrusted fabrication facility by incorporating a locking key that hides the circuit’s functional and structural information.

Dr. Srivastava’s project will develop a system-level methodology to design locked digital circuits that are rendered useless if the attacker uses any incorrect key and are resilient to state-of-the art attacks such as a satisfiability attack (SAT).

The project will develop several high-level design optimization techniques to open new possibilities of locking design details at the system level. The main optimization goal is corruption of an application for any incorrect key. The techniques are designed to automatically inform gate level locking constructions to achieve resiliency against SAT attacks. A few error critical inputs first will be identified at the application level. Then the architecture will be synthesized using appropriate system-level decisions to render the circuit dysfunctional for a wrong input key.