Event
MPACT Lecture: Stephen Trimberger, "Three Ages of FPGAs"
Thursday, October 4, 2018
2:30 p.m.-4:00 p.m.
Jeong H. Kim Engineering Building Rotunda
https://mpact.splashthat.com
A. James Clark School inaugural Mpact Lecture
Three Ages of FPGAs: A Retrospective on the First Thirty Years of Field Programmable Gate Array Technologies
Dr. Stephen Trimberger
Program Manager, Microelectronics Technology Office
DARPA
Visiting Research Engineer, Institute for Systems Research
Member, National Academy of Engineering
Networking reception begins at 2:30 pm; lecture starts promptly at 3:00 pm.
Learn More and RSVP Here: https://go.umd.edu/USY
Abstract
Since their introduction, field programmable gate arrays (FPGAs) have grown in capacity by more than a factor of 10,000 and in performance by a factor of 100. Cost and energy per operation have both decreased by more than a factor of 1000. These advances have been fueled by process technology scaling, but the FPGA story is much more complex than simple technology scaling. Quantitative effects of Moore's Law have driven qualitative changes in FPGA architecture, applications and tools. As a consequence, FPGAs have passed through several distinct phases of development. These phases, termed “Ages” are: The Age of Invention, The Age of Expansion and The Age of Accumulation.
Biography
Stephen Trimberger holds a Ph.D. degree from California Institute of Technology. From 1988 until 2017, he was employed at Xilinx, rising to the position of Xilinx Fellow, heading the Circuits and Architectures Group in Xilinx Research Labs. He was the technical leader for the XC4000 design automation software, developed the Xilinx multi-context FPGA, led the architecture definition group for the Xilinx XC4000X families, and designed the bitstream security functions in the Xilinx Virtex and subsequent families of FPGAs. He led the group that developed the first die-stacked 3D FPGA prototype at Xilinx. He has served as Design Methods Chair for the Design Automation Conference, Program Chair and General Chair for the ACM/SIGDA FPGA Symposium and on the technical programs of numerous conferences and symposia. He has authored five books and dozens of papers on design automation, FPGA architectures and hardware security. He has more than 230 patents in IC design, FPGA and ASIC architecture, CAE, and hardware security. His innovations appear today in nearly all commercial FPGA devices. He is a member of the United States National Academy of Engineering, a Fellow of the ACM, Fellow of the IEEE, and recipient of the 2018 IEEE Don Pederson Award for outstanding contributions to solid state circuits.
