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Automatic Parallelization Using Binary Rewriting (ISR IP)

ISR intellectual property available to license

Inventors: Rajeev Barua, Aparna Kotha

For more information
If you would like to license this intellectual property, have questions, would like to contact the inventors, or need more information, contact ISR External Relations Director Jeff Coriale at coriale@umd.edu or 301.405.6604.

Find more ISR IP
You can go to our main IP search page to search by research category or faculty name. Or view the entire list of available IP on our complete IP listing page.

ISR-IP-Barua ISR-IP-embedded ISR-IP-compilers

Related Articles:
Simulator of the Explicit Multi-Threading (XMT) Computer Architecture and Software Tools for Programming It (ISR IP)
Binary Rewriting Without Relocation Information (ISR IP)
A Dynamic Memory Allocator for Embedded Systems with Scratch-Pad Memory (ISR IP)

June 23, 2007


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For more information, contact ISR External Relations Director
Jeff Coriale at coriale@umd.edu or 301.405.6604.

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