Gang Qu received his M.S. and Ph.D. degrees in Computer Science from UCLA in 1998 and 2000, respectively. Previously, he had studied Mathematics in the University of Science and Technology of China (USTC) and the University of Oklahoma. He joined the Department of Electrical and Computer Engineering at the University of Maryland in 2000. He holds a joint appointment with the Institute for Systems Research. He is currently the director of Maryland Embedded System and Hardware Security (MeshSec) lab and wireless sensors laboratory.
Dr. Qu works on power/energy efficiency and security problems in the design of integrated circuits (IC), embedded systems, cyber physical systems, and the Internet of Things. He has more than 300 publications in these areas and served 18 times as the general or program chair/co-chair of international conferences, symposiums, and workshops. He is a co-founder of IEEE Asian Hardware Oriented Security and Trust (2016), the founding chair for the hardware security track in ACM Great Lakes Symposium on VLSI (2016), a co-founder of the Hot Picks in Hardware and System Security Workshop (2018), a co-founder of IEEE CEDA Hardware Security and Trust Technical Committee (2019). He has served as the associated editor for many scientific journals, including IEEE Transactions on Computers (TC), Transactions Emerging Topics in Computing (TETC), Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Transactions on Circuits and Systems II (TCAS-II), Embedded Systems Letters (ESL); ACM ACM Transactions on Design Automation for Electronic Systems (TODAES); Integration, the VLSI Journal; Journal of Computer Science and Technology (JCST); Journal of Hardware and System Security (HaSS); and Fundamental Research (FR).
Honors and awards
•IEEE Fellow, 2021
•Best Paper Awards: 33rd IEEE International System-on-Chip Conference (SOCC 2020); 4th IEEE Asian Hardware Oriented Security and Trust Symposium (AsianHOST 2019); 17th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2006); ACM SIGMOBILE International Conference on
• ACM Recognition of Service Awards, ACM SIG Governing Board (2019, 2006, 2005)
• Outstanding Systems Engineering Faculty Awards, ISR, University of Maryland (2020)
• George Corcoran Award, ECE Department, University of Maryland (2002)
Dr. Qu's research interests fall in the broad field of VLSI design automation with focus on low power and security issues in the design of integrated circuits (IC), embedded systems, cyber physical systems, and the Internet of Things. For real life problems, we build mathematical models, develop optimal and heuristic algorithms, implement practical solutions, and perform system prototyping. He has served on the ACM SIGDA Low Power Technical Committee and is the co-founder of IEEE CEDA Hardware Security and Trust Technical Committee.
The scope of his work on hardware and system security and trust goes from new materials, transistor, and logic gates to architecture, system, network, and application levels. Some examples include resistive RAM based authentication, polymorphic logic as a new hardware security primitive, ring oscillator physical unclonable functions (RO PUF), gate camouflage and logic obfuscation, secure scan chain design, VLSI intellectual property (IP) and IC protection, information hiding, fault injection and side channel attacks, fault tolerant and approximate computing for security and authentication, GPS spoofs attack detection and survival, insider attack detection in wireless network, security in smart grids and vehicles, privacy preservation in vehicular network, and more recently various security and trust issues in machine learning algorithms and their implementations.
He has made significant contributions in the power and energy efficient design of VLSI systems, embedded systems, wireless sensor networks, and the Internet of Things. He is among the first to investigate how to change system's operating voltage and clock frequency based on system's real time computation demands to reduce power and energy, which nowadays is known as dynamic voltage and frequency scaling. He proposed a series of studies on trading performance for energy saving (such as design with quality of service guarantee and probabilistic design), the key concept of approximate computing. More recently, he is looking into various security vulnerabilities introduced by aggressive power and energy reduction.
He has taught the following courses: ENEE 114, ENEE 244, ENEE 644, ENEE 759B, and ENEE 759Q. He won the George Corcoran Teaching Award in 2002.
Institute of Electrical and Electronics Engineers (IEEE)
- Fellow, 2021
- DARPA: Automated Implementation of Secure Silicon (AISS)
- DoD-Intel State-of-the-Art Heterogeneous Integrated Packaging (SHIP) Prototype Project: Red Team, Chiplet IP Protection and Countermeasures for State-of-the-Art Heterogeneous Integrated Packaging (SHIP) Prototype Project
- NSF EAGER: Designing Novel Polymorphic Gates as Hardware Security Primitives
- NIST: Silicon Physical Unclonable Functions (PUFs) as an Entropy Source
- ARO Special Programs: Building Robust and Practical PUFs with Configurable Ring Oscillators
- AFOSR MURI: Security Theory for Nano-Scale Devices
- DURIP - Upgrade of Measuring and Testing Equipment for the Development of Energy-Efficient Wireless Sensor Networks in Research and Education
- Information Hiding Based on Trusted Computing System Design